RFIC Design Overview of the Marvell 88W8686 Die found in the Wi2Wi W2CBW003 802.11 & Bluetooth System in a Package (SiP) Solution

Layout and design are critical to device performance. Nowhere is this truer than for RF devices. An RFIC Design Overview report from UBM TechInsights (SI) provides an overview of the die, package, and technology of a specific RF device, and identifies the major functional blocks and the percentage die area occupied by each.

RFIC Design Overview readers gain an understanding of the key layout structures and design features of each major functional block, along with the structure of embedded passive devices. This lets you learn from your competition, accelerate your total design time by minimizing the number of redesigns and respins, and bring a competitive, high performance RF device to market.

This report contains:
1) Package and die overview
   a) Device Description
   b) Description of package, x-ray and die markings
2) Device Measurements
   a) Die size, die thickness
   b) Number of poly & metal layers
   c) Minimum feature size
   d) Minimum widths and pitches for all poly and metal layers
3) Cross sections & images
   a) High magnification die photograph provided as a poster size plot
   b) Annotated die photograph illustrating location of identified functional blocks and identified pin outs
   c) Photographs of package top and bottom, and die markings
   d) Image of package x-ray showing bond pad to pin connectivity
   e) Photographs of selected on-chip passive components
   f) Photographs of RF packaged device on native PCB (illustrates number of external passives required)
   g) SEM cross-sections through selected passive devices and the package edge seal
   h) SEM cross-section showing thickness of all metal / poly layers
   i) SEM cross-sections showing minimum width / pitch of metal / poly layers
4) Functional overview
   a) High level block diagram developed from publicly  available datasheets
   b) Location and area measurements of major identified functional blocks (such as: PLLs, LNA, PAs, analog, and logic) with die photograph
   c) Physical area measurements for each identified functional block, I/Os, logic, and analog in absolute and percentage terms
   d) Identification of ESD structures
5) Major RF Device Overview
   a) Identification and images of selected on chip passive components (capacitors, inductors, bond pads, etc.)
   b) Textual description of selected devices based on SI experience with similar chips
   c) Length of bond wire traces for critical Rx and Tx signals
6) Process overview
   a) Process node
   b) Minimum feature size
   c) Minimum width / pitch of metal / poly layers
   d) Number / thickness of metal / poly layers
   e) Process type (CMOS, BiCMOS, HBT, etc.)
   f) Substrate material (GaAs, SiGe, Si)
   g) RF process extensions (i.e. poly resistors, MIM capacitors, varactors, thick top metal, polyimide die coat, deep n-well RF isolation structures, high performance transistors)
7) Poster size plot of die photo
   a) High magnification, poster size, die photo at top metal (maximum of 20 stitched sub-images per die)
   b) Delivered in plotted hardcopy and electronic tiff format.
   c) Device Summary information printed above plotted image for quick reference.
8) Techniques applied
   a) Cross section
   b) SEM