ESD Protection Structure and Circuit Analysis of the Micron MT41J128M8BY-25 ES:B 1G 78nm DDR3 SDRAM

This report provides a thorough investigation of the circuits and device structures used to protect three pad types on the DRAM:
· Input (Address)
· Data I/O
· VDD

The following sample preparation and imaging are included in the report:
- Device decapsulation
- De-layering to each relevant interconnect level
- Copper staining of the substrate level to identify n- and p-type devices
- Optical topographic imaging of the ESD circuit layout at one of each of the three pad types
- Cross sectioning of key ESD protection devices
- SEM imaging of the ESD device structures

The analysis report will include:
- ESD circuit schematics for the input, data and VDD pin
- Topographical SEM images accompanying the circuit schematics will be annotated with the device identification used in the schematics
- Horizontal dimensions of key ESD protection devices
- Analysis of the ESD implementation – e.g. innovative device structures or circuits employed, robustness of the design etc.

Optional analyses includes TEM cross section of the transistor used in the ESD protection devices.