CircuitVision Analysis on the Array and Peripheral of the Hynix H5PS1G83EFR 54nm 1Gb DDR2 SDRAM

This analysis covers circuit extraction, analysis and organization of the Array and Peripheral area. It includes deliverables such as:

• Package Photographs (Top and Bottom)
• Package X-Ray
• Die Photograph
• Die Map (Physical location of circuit elements)
• Dimensions
• Power Bussing
• Array Information
• Dimensions
• Wordline Structure
• Bitline Structure
• Bussing Layout diagram for one memory block
• Annotated topographical images of sense amplifiers
• Circuit diagram of sense amplifiers
• Annotated topographical images of final wordline drivers and column decoders
• Circuit diagrams of the final/global wordline drivers and column decoders
• Topographical images of DRAM array

The following circuit blocks are included for one memory block:
• Diagram of the circuit blocks around a memory block
• Row decoders
• Main wordline drivers
• X+ drivers
• Local wordline drivers
• Y access drivers
• Bitline sense amplifiers
• SP and SN drivers
• Local data access