CircuitVision Analysis on the Address Path of the Hynix H5PS1G83EFR 54nm 1Gb DDR2 SDRAM

This analysis covers circuit extraction, analysis and organization of entire address path. It includes deliverables such as:

Architectural Overview

• Package Photographs (Top and Bottom)
• Package X-Ray
• Die Photograph
• Die Map (Physical location of circuit elements)
• Array Information
• Dimensions
• Wordline Structure
• Bitline Structure
• Power Bussing

Address Path

• Annotated topographical images of wordline drivers
• Hierarchical block diagram of address path
• Address buffers
• Row and column address latches (including latency configuration if applicable)
• Refresh and burst counters
• Block and wordline decoding
• Bitline decoding
• Redundancy scheme for row and column