CircuitVision of the Termination Control on the Hynix H5PS1G83EFR 54nm 1Gb DDR2 SDRAM

This CircuitVision report includes detailed analysis of the DQ termination control on the Hynix H5PS1G83EFR 1Gb DDR2 SDRAM. The report includes circuit schematics and corresponding layout information for a representative DQ pin. This includes both the input buffer and output driver along with corresponding ODT and OCD control.